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| Ordering number : ENN6295 Monolithic Linear IC LA6544M Four-Channel Bridge (BTL) Driver for CD-ROM Overview The LA6544M is a 4-channel bridge (BTL) driver developed for use in CD-ROM systems. Functions * Bridge connected (BTL) four-channel power amplifier * VCE (residual voltage) minimized (channels 1 to 3) by using two power supplies. * IOmax: 1.0 A * Muting circuit provided (output on/off control) Pd max -- Ta Allowable power dissipation, Pdmax -- W 2.4 (MUTE pin: low for output off, high for output on. MUTE1: controls channel 1, MUTE2: controls channels 2, 3, and 4.) * Thermal protection (shutdown) circuit * Separated output stage power supply (VS1: channels 1, 2, and 3, VS2: channel 4) Package Dimensions unit: mm 3129-MFP36SLF [LA6544M] 36 19 Mounted on a PCB 2.0 2.1 PCB: 76.1 x 114.3 x 1.6 glass epoxy mm3, 1.6 1.26 1.2 Independent IC 0.8 0.9 15.3 2.25 2.5max 0.54 0.4 0.4 0 -20 0 20 40 60 75 80 100 0.8 0.85 Ambient temperature, Ta -- C SANYO: MFP36SLF Specifications Maximum Ratings at Ta = 25C Parameter Maximum supply voltage 1 Maximum supply voltage 2 Input voltage MUTE pin voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCC max VS max VIN max VMUTE max Pd max Topr Tstg Independent IC Mounted on the specified PCB (76.1 x 114.3 x 1.6 mm3, glass epoxy) VCC VS1, 2 VS1, 2, VCC VS1, 2 Each of the input pins VIN1 to VIN4 Conditions Ratings 14 14 13 13 0.9 2.1 -20 to +75 -55 to +150 Unit V V V V W W C C Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 42800RM (OT) No. 6295-1/7 0.1 0.65 1 18 0.25 9.2 10.5 7.9 LA6544M Recommended Operating Conditions at Ta = 25C Parameter Operating supply voltage VS1, 2 Symbol VCC VCC VS1, 2 VS1 and VS2 are the output stage power supply. VCC VS1 and VS2 Conditions Ratings 4 to 13 4 to 13 Unit V V Electrical Characteristics at Ta = 25C, VCC = VS2 = 12 V, VS1 = 5 V, VREF = 2.5 V Parameter VCC no load current drain 1 VCC no load current drain 2 VS1 no load current drain 1 VS1 no load current drain 2 VS2 no load current drain 1 VS2 no load current drain 2 Output offset voltage Input voltage range 1 Input voltage range 2 Output voltage 1 Output voltage 2 Closed circuit voltage gain Slew rate Muting on voltage Symbol ICC-ON ICC-OFF IS1-ON IS2-OFF IS2-ON IS2-OFF Conditions Output on (MUTE1 and MUTE2: high), VCC Output off (MUTE1 and MUTE2: low), VCC Output on (MUTE1 and MUTE2: high), VS1 Output off (MUTE1 and MUTE2: low), VS1 Output on (MUTE1 and MUTE2: high), VS2 Output off (MUTE1 and MUTE2: low), VS2 -50 0 0 4 10.5 4.5 11 7 14 0.5 1.5 2 5 20 Ratings min typ 10 max 25 4 35 4 10 4 +50 VS1 VS2 Unit mA mA mA mA mA mA mV V V V V dB dB V/s V Potential difference between the + and - outputs for each VOF1 to 4 channel VIN1 VIN2 VO1 VO2 VG1 VG2 SR VMUTE Input voltage range for channels 1, 2, and 3 Input voltage range for channel 4 IO = 700 mA, the difference between the outputs for channels 1, 2, and 3 IO = 700 mA, the difference between the outputs for channel 4 The BTL amplifier voltage gain for channels 1, 2, and 3 The BTL amplifier voltage gain for channel 4 *1 MUTE1 and MUTE2. The voltage at which the output turns on. *2 Notes: 1. Design guarantee value. 2. The MUTE1, and MUTE2 pins turn the output on when high and off when low. When the output is off, the outputs will be in the high-impedance state. The figure below shows the relationship between the channels and the MUTE pins and between the channels and the power supplies. System Figure MUTE1 CH1 (7 dB) CH2 (7 dB) VS1 MUTE2 CH3 (7 dB) CH4 (14 dB) VS2 A12681 No. 6295-2/7 LA6544M Block Diagram and Pin Assignment RF 1 Thermal shutdown circuit 36 RF RF 2 MUTE1 Channel 1 output on/off - + 35 RF (NC) 3 MUTE2 Channels 2, 3, and 4 output on/off - + 34 VSS1 VSS2 4 33 VSS1-OUT VSS2-OUT 5 32 VO1+ MUTE1 6 MUTE1 12.5 k 11 k 31 VO1- VIN1 7 - + VS1 power supply (channels 1, 2, and 3) 30 VS1 VG1 8 12.5 k 11 k 29 VO2+ VIN2 9 - + 28 VO2- VG2 10 12.5 k 11 k VIN3 11 - + VS1 power supply (channel 4) 27.5 k 11 k VIN4 13 - + 27 VO3+ 26 VO3- VG3 12 25 VS2 24 VO4+ VG4 14 23 VO4- MUTE2 15 MUTE2 - + 22 VREF OUT VCC 16 Input stage power supply (all channels) 21 VREF IN RF 17 20 RF RF 18 19 RF A12682 No. 6295-3/7 LA6544M Pin Functions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Pin RF RF (NC) VSS2 VSS2-OUT MUTE1 VIN1 VG1 VIN2 VG2 VIN3 VG3 VIN4 VG4 MUTE2 VCC RF RF RF RF VREF IN VREF OUT VO4- VO4+ VS 2 VO3- VO3+ VO2- VO2+ VS 1 VO1- VO1+ VSS1-OUT VSS1 RF RF Substrate (lowest potential) Substrate (lowest potential) Unused. Connect to VS2. Output stage reference voltage output ((VS2-VBE)/2, typical) Channel 1 output on/off control Channel 1 input Channel 1 input (gain adjustment) Channel 2 input Channel 2 input (gain adjustment) Channel 3 input Channel 3 input (gain adjustment) Channel 4 input Channel 4 input (adjustment) Channels 2, 3, and 4 on/off control Power supply Substrate (lowest potential) Substrate (lowest potential) Substrate (lowest potential) Substrate (lowest potential) Reference voltage input (VREF1 buffer amplifier input) Reference voltage output (VREF1 buffer amplifier output) Channel 4 inverted output Channel 4 noninverted output Channel 4 output stage power supply Channel 3 inverted output Channel 3 noninverted output Channel 2 inverted output Channel 2 noninverted output Channels 1, 2, and 3 output stage power supply Channel 1 inverted output Channel 1 noninverted output Output stage reference voltage (Outputs VSS/2: typical) (VREF2 buffer amplifier output) Connect to VS1. (VSS1 - OUT is generated by a resistor divider.) Substrate (lowest potential) Substrate (lowest potential) Function No. 6295-4/7 LA6544M Sample Application Circuit VS(5V) 1 2 3 4 5 MUTE1 Loading input 6 7 8 Gain setting Focus input 9 10 Gain setting Tracking input 11 12 Gain setting Sled input 13 14 Gain setting MUTE2 VCC (12 V) 15 16 17 18 RF RF (NC) VSS2 VSS2-OUT MUTE1 VIN1 VG1 VIN2 VG2 VIN3 VG3 VIN4 VG4 MUTE2 VCC RF RF RF 36 RF 35 VSS1 34 VSS1-OUT 33 VO1+ 32 M VO1- 31 VS1 30 VO2+ 29 Focus coil VO2- 28 VO3+ 27 Tracking coil VO3- 26 VS2 25 VO4+ 24 M VO4- 23 VREF OUT 22 VREF IN 21 RF 20 RF 19 VREF Sled motor Loading motor LA6544M A12683 No. 6295-5/7 LA6544M Pin Description Pin No. Pin Symbol Function VCC Equivalent circuit 7 8 9 10 11 12 13 14 VIN* VG* (Input) VIN1 VG1 VIN2 VG2 VIN3 VG3 VIN4 VG4 11 9 Inputs for each channel 13 7 12 8 14 10 VIN 11 k VG RF VREF OUT A12684 32 31 29 28 27 26 24 23 VO * (Output) VO1+ VO1- VO2+ VO2- VO3+ VO3- VO4+ VO4- VCC VS VCC Outputs for each channel VO 23 24 26 27 28 29 31 32 RF A12685 6 15 MUTE MUTE1 MUTE2 Output on/off control 6 15 MUTE1, 2 100 k RF 100 k A12686 No. 6295-6/7 LA6544M Gain Setting (Functions of the Input and Gain Adjustment Pins) The figures present overviews of the VIN and VG pin circuits. (These are the same as the block diagrams.) 1. Consider resistors (11 k, typical) to be inserted between the VIN and VG pins. This should be seen as being the same as the operational amplifier noninverting input (VIN+). 2. If the VG pins are not used, and only the VIN pins are used, the BTL gain (across the VO+ and VO- outputs) will be 7 dB for channels 1, 2, and 3 (amplifier units: 1 dB + BTL: 6 dB) and 14 dB for channel 4 (amplifier units: 8 dB + BTL: 6 dB). If the VIN pins are not used and 11 k external resistors are attached to the VG pins, input to the opposite ends of those resistors will result in equivalent circuit operation. However, the VIN pins should be used and the gain set to minimize the I/O gain temperature characteristics. 12.5 k 11 k VIN1 to VIN3 - + VG1 to VG3 27.5 k 11 k VIN4 - + VG4 A12687 Offset Voltage This IC includes built-in level shifting circuits. For input to which VREF is applied as a reference, the output is referenced to the voltage VSS1/2 (V) for channels 1, 2, and 3, and the output is referenced to the voltage (VSS2 - VBE(0.7))/2 (V) for channel 4. Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of April, 2000. Specifications and information herein are subject to change without notice. PS No. 6295-7/7 |
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